收藏本站
Si550
4
Rev. 0.5
Table 5. CLK± Output Phase Jitter
Parameter
Symbol
Test Condition
Min
Typ
Max
Units
Phase Jitter (RMS)1,2,3
for FOUT > 500 MHz
φ
J
Kv = 45 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.35
0.38
—
ps
Kv = 90 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.43
0.41
—
Kv = 135 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.52
0.46
—
Kv = 180 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.64
0.52
—
Phase Jitter (RMS)1,2,3
for FOUT of 125 to 500 MHz
φ
J
Kv = 45 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.42
0.58
—
ps
Kv = 90 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.48
0.60
—
Kv = 135 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.57
0.64
—
Kv = 180 ppm/V
12 kHz to 20 MHz (OC-48)
50 kHz to 80 MHz (OC-192)
—
0.67
0.68
—
Notes:
1. Differential Modes: LVPECL/LVDS/CML. Refer to AN255, AN256, and AN266 for further information.
2. For best jitter and phase noise performance, always choose the smallest KV that meets the application’s minimum APR
requirements. See “AN266: VCXO Tuning Slope (KV), Stability, and Absolute Pull Range (APR)” for more information.
3. See “AN255: Replacing 622 MHz VCSO devices with the Si550 VCXO” for comparison highlighting power supply
rejection (PSR) advantage of Si55x versus SAW-based solutions.
Table 6. CLK± Output Period Jitter
Parameter
Symbol
Test Condition
Min
Typ
Max
Units
Period Jitter*
for FOUT < 160 MHz
JPER
RMS
—
2
—
ps
Peak-to-Peak
—
14
—
*Note: Any output mode, including CMOS, LVPECL, LVDS, CML. N = 1000 cycles. Refer to AN279 for further information.
发布紧急采购，3分钟左右您将得到回复。

采购需求

(若只采购一条型号，填写一行即可)

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

*型号 *数量 厂商 批号 封装
添加更多采购

我的联系方式

*
*
*
相关PDF资料
552AC000189BGR VCXO, CLOCK, 126.2 MHz, LVPECL OUTPUT
554CD000010BGR VCXO, CLOCK, 108 MHz, CMOS OUTPUT
554CD000110BGR VCXO, CLOCK, 108 MHz, CMOS OUTPUT
550AD216M000BGR VCXO, CLOCK, 216 MHz, LVPECL OUTPUT
554MD000244BG VCXO, CLOCK, 166.6286 MHz, LVPECL OUTPUT
550BF54M0000BG VCXO, CLOCK, 54 MHz, LVDS OUTPUT
550CC25M0000BG VCXO, CLOCK, 25 MHz, CMOS OUTPUT
550DD1046M00BG VCXO, CLOCK, 1046 MHz, CMOS/TTL OUTPUT
相关代理商/技术参数
550AD669M327DG 制造商:Silicon Laboratories Inc 功能描述:CNTRLD OSC 669.327MHZ VCXO LVPECL 6SMD - Trays
550AD669M327DGR 制造商:Silicon Laboratories Inc 功能描述:
550AD74M1758DG 制造商:Silicon Laboratories Inc 功能描述:OSCILLATOR - Trays
550AD75M1758DG 制造商:Silicon Laboratories Inc 功能描述:OSCILLATOR - Trays
550AD77M7600DG 制造商:Silicon Laboratories Inc 功能描述:CNTRLD OSC 77.76MHZ VCXO LVPECL 6SMD - Trays
550AD983M040DG 功能描述:VCXO振荡器 SINGLE VCXO 6 PIN 0.5PS RS JTR RoHS:否 制造商:Fox 封装 / 箱体:5 mm x 3.2 mm 频率:19.2 Mhz 频率稳定性:2.5 PPM 输出格式: 封装:Reel 电源电压:3 V 端接类型:SMD/SMT 尺寸:3.2 mm W x 5 mm L x 1.5 mm H 最小工作温度:- 20 C 最大工作温度:+ 75 C
550AE000131DGR 制造商:Silicon Laboratories Inc 功能描述:CNTRLD OSC 669.32658MHZ VCXO LVPECL 6SMD - Tape and Reel
550AE100M000DG 功能描述:VCXO振荡器 550 VCXO LVPECL 3.3V 100MHz RoHS:否 制造商:Fox 封装 / 箱体:5 mm x 3.2 mm 频率:19.2 Mhz 频率稳定性:2.5 PPM 输出格式: 封装:Reel 电源电压:3 V 端接类型:SMD/SMT 尺寸:3.2 mm W x 5 mm L x 1.5 mm H 最小工作温度:- 20 C 最大工作温度:+ 75 C